MICA is the first end-to-end compiler for mesh-based AI accelerators. Submitted to OSDI 2026 and developed in collaboration with leading AI chip manufacturers, it enables automatic model adaptation for next-generation AI hardware — turning weeks of manual wafer-scale scheduling into hours of automated compilation, with generated code outperforming expert hand-tuned implementations.

Key Features

MeshIR Intermediate Representation — A novel IR design using region-aware tensors and kernels that explicitly expresses locality and placement constraints, letting the compiler "understand" mesh architecture.

Spatio-Temporal Schedule Search — Efficiently explores the schedule space across millions of cores to automatically generate optimal scheduling plans.

End-to-End Compilation Stack — Complete compilation pipeline from high-level model descriptions to mesh accelerator executable code.

Results

  • 3.6x performance improvement over SOTA compilers (validated on real hardware)
  • 1.4x faster than expert hand-tuned optimizations
  • Wafer-scale scheduling search reduced from weeks to hours
  • Compiled applications run 100–200x faster than GPU

Collaborators

Leading AI chip manufacturers